

As AI algorithms become more complex, they consume disproportionately greater run-time and energy. This makes meeting performance or efficiency goals require some level of hardware acceleration. The highest levels of performance and efficiency are achieved with custom hardware. Traditional hardware design and verification methodologies are labor-intensive and time-consuming and are not a good match for rapidly evolving AI technologies.
We will introduce the application of High-Level Synthesis (HLS) for automating many of the hardware design tasks involved in creating a bespoke accelerator. Using HLS, popular machine learning frameworks, and Quantize-Aware Training, we can build highly optimized and bit precise hardware, targeting ASIC or FPGA implementations.

Cameron Villone
Cameron Villone is a High-Level Synthesis Technologist working with the Catapult High-Level Synthesis product management and marketing team, focusing on AI hardware deployment. He previously worked as a product marketing engineer for PowerPro, Siemens’ power optimization and analysis product. He held previous roles at Texas Instruments and General Motors. Cameron studied and graduated from Rochester Institute of Technology, obtaining both a bachelor's and master's degree in electrical engineering, focusing on Robotics, Embedded Systems, and Computer Vision.
Siemens
Website: https://eda.sw.siemens.com/en-US/
Siemens is rapidly expanding our number one position in digital industrial software to enable our customers to swiftly advance in their digital transformation. With the un-matched breadth and depth of the Siemens Xcelerator portfolio, Siemens is enabling customers to leverage AI to break down the barriers between their electrical, mechanical and software design silos, between their design, manufacturing, and ERP silos within all markets. It enables customers to bridge the virtual and physical design and manufacturing worlds, empowering customers to rapidly evolve from systems to market-leading ecosystems companies so they can leverage AI to engineer a smarter future faster – and deliver smart products, factories, infrastructure, and cities – for us all.
Semiconductor development faces increasing complexity, faster timelines, and fierce competition, exposing the limitations of traditional EDA tools. In response, AI Agents, powered by LLMs and advanced algorithms, are emerging as next-gen solutions. This session explores how these agents surpass conventional automation by independently managing tasks like hardware modeling, constraint solving, debugging, testbench creation, and design optimization. We'll cover real-world use cases showing how AI Agents deliver improved productivity, design quality, and time-to-market, including their ability to autonomously detect bugs and optimize RTL designs.

Mehir Arora
Mehir Arora is a founding engineer at ChipAgents, a company at the forefront of integrating agentic AI into Electronic Design Automation (EDA) workflows. Graduated from UC Santa Barbara, Mehir has contributed to advancing state-of-the-arts in AI methodologies, including a paper presented at ICML 2024. At ChipAgents, he focuses on developing agentic AI tools that enhance chip design and verification processes, aiming to significantly improve efficiency and productivity in semiconductor engineering.
Arm Neoverse is designed to meet these evolving needs, offering high compute density, exceptional energy efficiency, and a strong total cost of ownership (TCO). As host processors, Neoverse-based CPUs integrate seamlessly with GPUs and AI accelerators to enable flexible, power-efficient, and high-performance deployments across heterogeneous AI platforms capable of managing the complexity and coordination required by agentic AI systems.
In this session, we’ll demo an agentic AI application running on an AI server powered by Arm Neoverse as the host node. The application coordinates multiple agents to accelerate decision-making and streamline workload execution. We’ll also highlight the advantages of running agentic AI on heterogeneous infrastructure, explain why Arm CPUs are ideal as host processors, and demonstrate how Arm provides a scalable, efficient foundation for real-world enterprise and cloud environments.

Na Li
Na Li is Principal AI Solution Architect for the Infrastructure Line of Business (LOB) at Arm. She is responsible for creating AI solutions that showcase the values on Arm-based platforms. She has around 10 years of experience developing AI applications across various industries. Originally trained as a computational neuroscientist and received a PhD from the University of Texas at Austin.
Arm
Website: https://www.arm.com/markets/artificial-intelligence
Arm is the industry’s highest-performing and most power-efficient compute platform with unmatched scale that touches 100 percent of the connected global population. To meet the insatiable demand for compute, Arm is delivering advanced solutions that allow the world’s leading technology companies to unleash the unprecedented experiences and capabilities of AI. Together with the world’s largest computing ecosystem and 20 million software developers, we are building the future of AI on Arm.
AI inference costs are high and workloads are growing, especially when low latency is required. We demonstrate NorthPole's energy efficiency and high throughput for low-latency edge and datacenter inference tasks.

John Arthur
John Arthur is a principal research scientist and hardware manager in the brain-inspired computing group at IBM Research - Almaden. He has been building efficient and high-performance brain-inspired neural network chips and systems for the last 25 years, including Neurogrid at Stanford and both TrueNorth and NorthPole at IBM. John holds a PhD in bioengineering from University of Pennsylvania and BS in electrical engineering from Arizona State University.
Google Cloud provides leading infrastructure, platform capabilities, and industry solutions. We deliver enterprise-grade cloud solutions that leverage Google’s cutting-edge technology to help companies operate more efficiently and adapt to changing needs, giving customers a foundation for the future. Customers in more than 150 countries use Google Cloud as their trusted partner to solve their most critical business problems.

Manuel Botija
Manuel Botija is an engineer with degrees from Telecom Paris and Universidad Politécnica de Madrid. Over the past 17 years, he has led product innovation in semiconductor startups across Silicon Valley and Europe. Before joining Axelera, Manuel served as Head of Product at GrAI Matter Labs, which was acquired by Snap Inc.
Axelera
Website: https://www.axelera.ai/
High Performance, Low Power, Cost Efficient Inference at the Edge
Axelera AI is delivering the world’s most powerful and advanced solutions for AI at the Edge. Its industry-defining Metis™ AI platform – a complete hardware and software solution for AI inference at the edge – makes computer vision applications more accessible, powerful and user friendly than ever before. Based in the AI Innovation Center of the High Tech Campus in Eindhoven, The Netherlands, Axelera AI has R&D offices in Belgium, Switzerland, Italy and the UK, with over 195 employees in 18 countries. Its team of experts in AI software and hardware come from top AI firms and Fortune 500 companies.
Outdated x86 CPU/NIC architectures bottleneck AI's power, limiting true Generative AI potential. NeuReality's groundbreaking NR1® Chip combines entirely new categories of AI-CPU and AI-NIC into one single chip, fundamentally redefining AI data center inference solutions. It solves these bottlenecks, boosting Generative AI token output up to 6.5x for the same cost and power versus x86 CPU systems, making AI widely affordable and accessible for businesses and governments. It works in harmony with any AI Accelerator/GPU, maximizing GPU utilization, performance, and system energy efficiency. Our NR1® Inference Appliance, with its built-in software, intuitive SDK, and APIs, comes preloaded with out-of-the-box LLMs like Llama 3, Mistral, DeepSeek, Granite, and Qwen for rapid, seamless deployment with significantly reduced complexity, cost, and power consumption at scale.

Moshe Tanach
Moshe Tanach is Founder and CEO at NeuReality.
Before founding NeuReality, he served as Director of Engineering at Marvell and Intel, leading complex wireless and networking products to mass production.
He also served as Appointed Vice President of R&D at DesignArt-Networks (later acquired by Qualcomm) developing 4G base station products.
He holds Bachelor of Science in Electrical Engineering (BSEE) from the Technion, Israel, Cum Laude.
NeuReality
Website: https://www.neureality.ai/
Founded in 2020, NeuReality is revolutionizing AI with its complete NR1® AI Inference Solutions powered by the NR1® Chip – the world's first true AI-CPU built for inference workloads at scale. This powerful chip redefines AI by combining computing—6x more powerful than traditional CPUs—with advanced networking capabilities in an AI-NIC, all in one cohesive unit. This includes on-chip inference orchestration, video, and audio capabilities, ensuring businesses and governments maximize their AI hardware investments.
Our innovative technology solves critical compute and networking bottlenecks where expensive GPUs often sit idle. The NR1 pairs with any AI accelerators (GPUs, FPGAs, ASICs), super boosting their utilization to nearly 100% from <50% today with traditional CPUs. This unlocks wasted capacity, delivering superior price/performance, unparalleled energy efficiency, and higher AI token output within the same cost and power.
The NR1 Chip is the heart of our ready-to-go NR1® Inference Appliance which can be built with any GPU. This compact server comes preloaded with our comprehensive NR Software suite, including all necessary SDKs and Inference APIs. Furthermore, it's equipped with optimized AI models for computer vision, generative AI, and agentic AI, featuring popular choices such as Llama 3, DeepSeek, Qwen, and Mixtral. Our mission is to make the AI revolution accessible and affordable, dismantling the barriers of excessive cost, energy consumption, and complexity for all organizations.